Speaker: Jerzy S. Respondek. Date/time: June 23, 11:30. Location: DSIC Department, Room 0S03, 1st Floor.
Abstract:
The goal of this talk is to demonstrate methods for constructing fast matrix multiplication algorithms and their applications. Another goal is to explore how to leverage the speedup provided by fast matrix multiplication algorithms in other problems, including non-matrix problems. It will also cover how to use Intel’s AMX instructions, CUDA, and other hardware-based matrix multiplication accelerators in applications.
Biography:
Jerzy S. Respondek is a Polish computer engineer with a postdoctoral degree in technical sciences. He is a professor in the Department of Applied Computer Science at the Faculty of Automatic Control, Electronics, and Computer Science at the Silesian University of Technology and specializes in numerical methods. He is the author of the monograph: “Fast Matrix Multiplication with Applications,” Studies in Big Data, Vol. 166, Springer Nature Switzerland AG 2025 (260 pages)