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One more step towards a fail safe chip

Researchers of iTEAM-UPV develop an advanced method that anticipates and corrects possible failures

[ 19/12/2018 ]

One more step towards a fail safe chip. A step taken by a group of researchers from the Universitat Politècnica de València, from the Institute of Telecommunications and Multimedia Applications (iTEAM). From their laboratories, located in the Polytechnic City of Innovation, they have developed an advanced method for the analysis and on-demand configuration of photonic circuits, which enables to anticipate the possible failures of a chip and reduce its impact in the design phase, before they come into operation. This development has been published in the journal Optica.

The work of the UPV researchers focuses on photonic circuits for generic purposes; these circuits are capable of providing multiple functions using a single architecture, a similar way to how microprocessors act in electronics. "With the tools we have developed, we would simplify and optimise the manufacturing and performance of these chips", says José Capmany, researcher at the Photonics Research Labs (PRL) of iTEAM-UPV.

According to professor Capmany, often times failures occur in the components of the circuits that end up affecting the final performance of the same. "This technique allows us to anticipate where the circuit will fail and, at that point, fine-tune the rest of the components to compensate for these deficiencies, and so guaranteeing maximum performance", he says. And all this in a completely unnoticeable way for the user.

"The analysis method is relatively simple: each of the units of the circuit is configured and, by applying mathematical induction techniques, offers a diagnosis of how the circuit would behave in each of the ports. From this diagnosis, we can carry out the modifications that we believe are appropriate in the configuration, "explains Daniel Pérez, a researcher from the UPV's PRL-iTEAM group. "Furthermore, the method allows us to simulate larger circuits, and validate their performance with current manufacturing techniques".

Another advantage of the work developed by the iTEAM is the lower cost of the chips. "If you are able to optimise the circuit through software, then the manufacturing phase is not so demanding, which enables to increase the performance in the production of these devices", adds Capmany

Chips with Artificial Intelligence

The work developed by the iTEAM researchers is also a first step towards the design and manufacture of photonic circuits with artificial intelligence techniques. "Thanks to this method, we can use machine learning algorithms to synthesise and design circuits. The current work being developed is the seed that needs an automatic learning method", adds Daniel Pérez.

The next challenge for the UPV's iTEAM researchers is to merge their latest works in the hardware design of the circuits with the advanced algorithms that allow to take advantage of the full potential of the integrated optics.

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